(sigemb-info 191) ASP-DAC 2008 FINAL CALL FOR PAPERS

[Hiroyuki Tomiyama <hiroyuki@xxxxxxx>]

組込み技術者・研究者各位

ASP-DACのCFPをお送りします。組込みシステム関係のトラックもあります。是非
ご投稿ください。

冨山宏之
名古屋大学

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                      ASP-DAC 2008: FINAL CALL FOR PAPERS

               Paper submission sever is now available at:

                         http://www.aspdac.com

            Deadline for submission:     5 pm KST, July 10 (Tue), 2007
            Notification of acceptance:  September 28 (Fri), 2007
            Deadline for final version:  5 pm KST, November 16 (Fri), 2007

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Asia and South Pacific Design Automation Conference 2008
http://www.aspdac.com/aspdac2008/
January 21-24, 2008     COEX, Seoul, Korea

Aims of the Conference:
ASP-DAC 2008 is the thirteenth in a series of annual international
conferences on VLSI design automation. Asia and South Pacific region
is one of the most active regions of design and fabrication of silicon
chips in the world. The conference aims at providing the Asian and
South Pacific CAD/DA and Design community with opportunities of
presenting recent advances in the technologies related to Electronic
 Design Automation (EDA) and discussing the future directions.
The format of the meeting intends to cultivate and promote an instructive
and productive interchange of ideas among EDA researchers/developers
and system/circuit/device designers. A wide variety of those scientists,
engineers, and students who are interested in theoretical issues in
EDA are also welcome.

Areas of Interest:
  Original papers on, but not limited to, the following areas are invited.
[1] System Level Design:
System VLSI and SOC design methods, System specification, Specification
languages, Design languages, Hardware-software co-design, Co-simulation,
Co-verification, Platform-based design, Design reuse and IP's
[2] Embedded and Real-Time Systems:
Low power system design, Network on chip, Communication architecture,
Memory architecture, Real-time OS and middleware, Compilation techniques,
ASIP synthesis
[3] Behavioral/Logic Synthesis and Optimization:
Behavioral/RTL synthesis, Technology-independent optimization,
Technology mapping, Interaction between logic design and layout,
Sequential and asynchronous logic synthesis
[4] Validation and Verification for Behavioral/Logic Design:
Logic simulation, Symbolic simulation, Formal verification, Equivalence
checking, Transaction-level/RTL and gate-level modeling and validation
[5] Physical Design (Routing): Routing, Repeater issues, Interconnect
optimization, Interconnect planning, Module generation, Layout verification
[6] Physical Design (Placement): Placement, Floorplanning, Partitioning,
Hierarchical design
[7] Timing, Power, Signal/Power Integrity Analysis and Optimization:
Timing analysis, Power analysis, Signal/power integrity, Clock and global
signal design
[8] Interconnect, Device and Circuit Modeling and Simulation:
Interconnect modeling, Interconnect extraction, Package modeling,
Circuit simulation, Device modeling/simulation, Library design,
Design fabrics, Design for manufacturability, Yield optimization,
Reliability
analysis, Emerging technologies
[9] Test and Design for Testability: Test design, Fault modeling, ATPG,
BIST
and DFT, Memory, core and system test
[10] Analog, RF and Mixed Signal Design and CAD:
Analog/RF synthesis, Analog layout, Verification, Simulation techniques,
Noise analysis, Analog circuit testing, Mixed-signal design considerations
[11] Leading Edge Design Methodologies:
Novel design methodologies for SOCs, SIPs, IP-cores, processors, memories,
A/D mixed circuits, Sensors, MEMS chips, FPGAs, reconfigurable systems,
etc.
and design examples based on the aforementioned methodologies

ASP-DAC 2008 University LSI Design Contest encourages submitting
original papers on
LSI design and implementation at universities and other educational
organizations.

Submission of Papers:
Deadline for submission: 5 pm KST, July 10 (Tue), 2007
Notification of acceptance: September 28 (Fri), 2007
Deadline for final version: 5 pm KST, November 16 (Fri), 2007
Panels, Special Sessions and Tutorials:
Suggestions and proposals are welcome and have to be addressed to
the Conference Secretariat (e-mail:aspdac2008@xxxxxxxxxxxxxx) no later than
5 pm KST, June 8 (Fri.), 2007.

Prospective Sponsors:
ACM SIGDA, IEEE Circuits and Systems Society,
IEEK (The Institute of Electronics Engineers of Korea)

ASP-DAC2008 Chairs:
General Chair: Chong-Min Kyung (KAIST)
Technical Program Co-Chairs: Kiyoung Choi (Seoul National Univ.),
Soonhoi Ha (Seoul National Univ.)
Technical Program Vice Chair: Ren-Song Tsay (National Tsing Hua Univ.)
Conference Secretariat:
Please contact Conference Secretariat (e-mail:aspdac2008@xxxxxxxxxxxxxx),
if you have questions or comments.

Specification of the paper submission format will be available at the
WEB site:
http://www.aspdac.com/aspdac2008/