(sigemb-info 66) ICCAD call for Paper

[Kazutoshi Wakabayashi <wakaba@xxxxxxxxxxxxx>]

設計技術、EDA技術にご関係の方

　LSI設計関係の4大学会の一つ、ICCADのCall For　Paperです。是非、投稿をご検討いただきますようお願い申し上げま
す。

　　投稿を期待できる研究者、技術者の方々に本メールを展開していただければ幸いです。

詳細は、HPは、www.iccad.com  でご覧ください。


若林＠Asian　Rep　（NEC)

＃＃＃＃＃＃＃＃＃＃　ICCAD-2006 Call for Papers  ＃＃＃＃＃＃＃＃＃＃

ICCAD serves EDA & Design professionals, highlighting new challenges and innovative solutions for 
Integrated-Circuit Design Technologies and Systems 
AREAS OF INTEREST AUTHOR INFORMATION AND FORMAT 
In addition to traditional CAD topics, ICCAD has expanded its focus to include innovative design technologies for devices, circuits, and systems in both CMOS and non-CMOS technologies. Original technical submissions focusing on, but not limited to, the following topics are invited:　
1) PHYSICAL DESIGN AND TEST
1.1 High-Level physical design and synthesis. Estimation and hierarchy management. Partitioning, floorplanning and global placement. Detailed and incremental placement.
1.2 Routing and detailed physical design. Detailed routing, post-placement layout and optimization. Clock network design.
1.3 Design and CAD for analog, RF, and mixed signal. Mixed technology design (thermal, packaging, micro-mechanical).
1.4 Testing. Fault modeling, delay test, analog and mixed signal test. Fault simulation. ATPG. BIST and DFT. Memory test and repair. Core, system, and MEMS test. Power issues in Test. Test data compression.

2) SYNTHESIS AND SYSTEM DESIGN
2.1 Logic synthesis. Interaction between physical design and logic synthesis. Technology mapping. Synthesis for FPGAs. Asynchronous circuit design. Optimization for area, timing, power, and yield. Design for manufacturable and robustness.
2.2 High-Level synthesis. Refinement techniques. Direct compilation and post-optimization. Physically aware techniques for early exploration. Micro-architectural transformations. Protocol and interface design for correctness. Memory system synthesis.
2.3 System synthesis. HW and SW co-optimization and co-exploration. Multi-processor systems (heterogeneous, homogeneous, reconfigurable). On-chip communication optimization. HW/SW platforms. Compilation and code generation techniques.
2.4 Embedded and programmable systems. Real-time software and RTOS. Reuse techniques. Rapid system prototyping. Methodologies and
case studies.

3) VERIFICATION, MODELING AND SIMULATION
3.1 Interconnect parameter extraction. Circuit simulation and circuit model generation.
3.2 Signal integrity analysis. Reliability and thermal analysis. Yield and EMC/EMI simulation techniques.
3.3 Gate, switch, and circuit level timing and power analysis. Power/Ground network analysis and optimization. LVS.
3.4 Formal verification techniques. HW/SW co-simulation. Switch, logic and behavioral simulation, and design validation. Software verification. Emulation.

4) INNOVATIVE DESIGN TECHNOLOGIES FOR SYSTEMS, CIRCUITS AND DEVICES
4.1 Trends and perspectives in system-level design, with emphasis on power, software, performance and configurable: SoC, SiP, programmable and reconfigurable platforms.
4.2 Novel circuit and system implementation styles: new circuit families, fault- and variations-tolerant circuits, FPGAs, programmable fabrics, and structured ASICs.
4.3 Novel ideas in layout and physical implementation: manufacturable layout, 3-D integration, packaging and package analysis.
4.4 Alternative technologies. Modeling, simulation, analysis and design methods for novel device structures: nanotechnology, MEMS, quantum, molecular and bioelectronics.

 Proposals for Panel Sessions and (Embedded) Tutorials are also invited. Panel suggestions should describe the topic and should list suggested participants. Tutorial suggestions should focus on the state-of-the art in a specific area. Both half-day and full-day tutorial suggestions are welcome. Embedded tutorials (1.5-2 hours) should address emerging fields. All tutorial proposals should list the presenters. 
PAPER SUBMISSION GUIDELINES
All submissions must be made electronically at the ICCAD web site (www.ICCAD.com) before 5:00 pm Mountain Daylight Time (GMT - 07:00), April 19, 2006. Papers will not be accepted for submission after 5:00 pm MDT. This is a firm deadline and no exceptions will be made.

Regular paper submissions must (1) be in PDF format only, (2) be no more than 8 pages (including the abstract, figures, tables, and references), double columned, 9pt or 10pt font, and (3) must not include name(s) or affiliation(s) of the author(s) anywhere on the manuscript, abstract, or bibliographic citations. Submissions not adhering to these rules, or those previously published or simultaneously submitted to another conference will be rejected. Additional submission guidelines are available on the ICCAD web site after March 15, 2006. Format templates are available on the ICCAD web site for your convenience, but are not required. All regular papers will be reviewed as finished papers; preliminary submissions will be at a disadvantage. Authors of accepted papers must sign a copyright release form for their paper. Notice of acceptance will be sent via email by June 20, 2006.
NOTE: In the proceedings, four pages are free of charge and each page beyond four pages is charged $125.00 per page.

ICCAD Home Page: http://www.iccad.com

Author's Schedule
Deadline for submissions: 5:00 pm MDT (GMT - 07:00) April 19, 2006
Notification of acceptance: June 20, 2006
Deadline for final version submission: 5:00 pm MDT, August 8, 2006
Strict paper submission deadline : April 19, 2006, 5:00 PM Mountain Daylight Time.

One or more outstanding submissions will be recognized with the IEEE/ACM William J. McCalla ICCAD Best Paper Award.

Please direct all correspondence to:
ICCAD Publications Department
MP Associates, Inc.
5405 Spine Rd., Ste. 102
Boulder, CO 80301
Telephone: 303-530-4562
Fax: 303-530-4334
Email: iccadpapers@xxxxxxxxxxxxxxxx

Conference dates: November 5-9, 2006


 
GENERAL CHAIR
Soha Hassoun
Tufts University
soha@xxxxxxxxxxxx
 PROGRAM CHAIR
Georges Gielen
Katholieke University Leuven
georges.gielen@xxxxxxxxxxxxxxxx
 PROGRAM VICE CHAIR
Sani Nassif
IBM Corp.
nassif@xxxxxxxxxx 

Kazutoshi Wakabayashi
Senior Manager, System CAD, System Devices Res. Labs. NEC Corp. 
Tel: +81-44-435-9486 　Fax: +81-44-435-9491
email: wakaba@xxxxxxxxxxxxx　

##  wakaba@xxxxxxxxxxxxxxxx　is not working. 

-waka

Kazutoshi Wakabayashi
System CAD, System Devices Res. Labs. NEC Corp.