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(sigemb-info 340) 論文募集 (Workshop on Optimizations for DSP and Embedded Systems:ODES))
- To: sigemb-info@xxxxxxx
- From: "Takeuchi, Yoshinori" <takeuchi@xxxxxxxxxxxxxxxxx>
- Date: Thu, 18 Dec 2008 10:10:24 +0900
SIGEMB MLの皆様、
MLをお借りし、来年2009年の3月にシアトルで開催されるODES-7
(7th Workshop on Optimizations for DSP and Embedded Systems)の
論文募集案内をお送りします.
ODES-7は,CGO-2009 (International Symposium on Code Generation and
Optimization)のWorkshopの一つです.
論文投稿締切は、 January 16, 2009 となっています。
是非とも、投稿のご検討をお願いいたします。
武内良典
------------------------------------------------------------------------
ODES-7: 7th Workshop on Optimizations for DSP and Embedded
Systems
http://www.imec.be/odes
March 22, 2009
Seattle, Washington
in conjunction with IEEE/ACM International Symposium on Code
Generation
and Optimization (CGO)
http://www.cgo.org/
Preliminary call for papers
Optimizations are crucial to meet the performance, power and cost
requirements that DSP and embedded systems have. The aim of the ODES
workshop is to give the opportunity to researchers and practitioners
working on this, to share their findings and get feedback. We think
interacting with the community is crucial to do relevant research,
and
therefore ODES tries to maximize the interaction by carefully
selecting
the program committee members that review the submissions and at the
workshop itself, reserving enough time for discussion.
Topics of Interest
Topics of interest include, but are not limited to:
+ Algorithmic transformations and code/software optimization
+ Hardware and software optimizations for low-power consumption
and/or
code density
+ Coprocessor and hardware accelerators
+ Compiler techniques and code generation for media processing
+ Optimization techniques for algorithms and systems for video
compression, pre and post processing
+ Frameworks for profiling and scheduling tasks
(multiple/concurrent) on
various hardware resources (single-core + hardware accelerators,
dual-core, system-on-a-chip, etc)
+ Hardware/software trade-offs with ASICs, FPGA's, DSPs,
general-purpose
processors, microcontrollers, etc as building blocks
+ Retargetable compilers and reconfigurable architectures
Important dates and deadlines
+ Submission: January 16, 2009
+ Acceptance: February 20, 2009
+ Final version: March 3, 2009
Submission guidelines
To encourage submissions of early work and more mature work, we are
allowing two submission formats:
* Either a full paper, not exceeding 10 pages in length, two-column
formatting preferred.
* Or a set of slides, along with a brief description (1-2 pages) of
the
main theme of the talk.
Include the list of authors and their affiliations, addresses,
telephone
and fax numbers, email addresses and the name of the corresponding
author.
Please send the submission/s by the deadline to: Tom Vander Aa and
Jagadeesh Sankaran via email at vanderaa@xxxxxxx and sankaran@xxxxxx
Program co-chairs:
Jagadeesh Sankaran sankaran@xxxxxx Texas Instruments
Tom Vander Aa vanderaa@xxxxxxx IMEC
Program Committee
Francisco Barat NXP
Shuvra Bhattacharrya University of Maryland
John Cavazos University of Delaware
Nitin Chandrachoodan IIT Madras
Henk Corporaal Technical University Eindhoven
Heiko Falk University of Dortmund
Murali Jayapala IMEC
Tor Jeremiassen Texas Instruments
Ossi Kalevo Nokia
Hee-Seok Kim Samsung
Vijay Narayanan Pennsylvania State University
Yoshinori Takeuchi Osaka University
Gary Tyson Florida State University
Past Workshops
ODES-1: http://www.ece.vill.edu/~deepu/odes/odes-1_program.html
ODES-2: http://www.ece.vill.edu/~deepu/odes/odes-2_program.html
ODES-3: http://www.ece.vill.edu/~deepu/odes/odes-3_program.html
ODES-4: http://www.ece.vill.edu/~deepu/odes/odes-4_program.html
ODES-5: http://www.ece.vill.edu/~deepu/odes/odes-5_program.html
ODES-6: http://www.imec.be/odes/