[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
(sigemb-info 245) Call For Paper (Workshop on Optimizations for DSP and Embedded Systems)
- To: sigemb-info@xxxxxxx
- From: "Takeuchi, Yoshinori" <takeuchi@xxxxxxxxxxxxxxxxx>
- Date: Mon, 07 Jan 2008 14:48:21 +0900
SIGEMB MLの皆様:
論文投稿締切り(2008/1/14)が近づいて参りましたので再度アナウンスさせて頂きます.
来年2008年の4月に開催されるODES-6 (6th Workshop on Optimizations for DSP and
Embedded Systems)の論文募集案内です.ODES-6は,CGO-2008 (International
Symposium on Code Generation and Optimization)のWorkshopの一つとなっています.
武内良典
========================================================================
ODES-6: 6th Workshop on Optimizations for DSP and Embedded Systems
http://www.imec.be/odes
April 6, 2008
Boston, Massachusetts
in conjunction with IEEE/ACM International Symposium on Code Generation
and Optimization (CGO)
http://www.cgo.org/
Call for papers
Optimizations are crucial to meet the performance, power and cost
requirements that DSP and embedded systems have. The aim of the ODES
workshop is to give the opportunity to researchers and practitioners
working on this, to share their findings and get feedback. We think
interacting with the community is crucial to do relevant research, and
therefore ODES tries to maximize the interaction by i) carefully selecting
the program committee members that review the submissions and ii) at the
workshop itself, having both a formal presentation of the work as well as
a poster session.
Topics of Interest
Topics of interest include, but are not limited to:
+ Algorithmic transformations and code/software optimization
+ Hardware and software optimizations for low-power consumption
and/or
code density
+ Coprocessor and hardware accelerators
+ Compiler techniques and code generation for media processing
+ Optimization techniques for algorihms and systems for video
compression, pre and post processing
+ Frameworks for profiling and scheduling tasks
(multiple/concurrent) on
various hardware resources (single-core + hardware accelerators,
dual-core, system-on-a-chip, etc)
+ Hardware/software trade-offs with ASICs, FPGA's, DSPs,
general-purpose
processors, microcontrollers, etc as building blocks
+ Retargetable compilers and reconfigurable architectures
Important dates and deadlines
+ Submission: January 14, 2008
+ Acceptance: February 18, 2008
+ Final version: March 3, 2008
Submission guidelines
To encourage submissions of early work and more mature work, we are
allowing two submission formats:
* Either a full paper, not exceeding 10 pages in length, two-column
formatting preferred.
* Or a set of slides, along with a brief description (1-2 pages) of
the
main theme of the talk.
Include the list of authors and their affiliations, addresses,
telephone
and fax numbers, email addresses and the name of the corresponding
author.
Please send the submission/s by the deadline to: Tom Vander Aa and
Jagadeesh Sankaran via email at vanderaa@xxxxxxx and sankaran@xxxxxx
Program co-chairs:
Jagadeesh Sankaran sankaran@xxxxxx Texas Instruments
Tom Vander Aa vanderaa@xxxxxxx IMEC
Past chair:
Deepu Talla Texas Instruments
Program Committee
Francisco Barat NXP
Shuvra Bhattacharrya University of Maryland
John Cavazos University of Delaware
Nitin Chandrachoodan IIT Madras
Henk Corporaal Technical University Eindhoven
Heiko Falk University of Dortmund
Murali Jayapala IMEC
Tor Jeremiassen Texas Instruments
Ossi Kalevo Nokia
Hee-Seok Kim Samsung
Yoshinori Takeuchi Osaka University
Gary Tyson Florida State University
Past Workshops
ODES-1: http://www.ece.vill.edu/~deepu/odes/odes-1_program.html
ODES-2: http://www.ece.vill.edu/~deepu/odes/odes-2_program.html
ODES-3: http://www.ece.vill.edu/~deepu/odes/odes-3_program.html
ODES-4: http://www.ece.vill.edu/~deepu/odes/odes-4_program.html
ODES-5: http://www.ece.vill.edu/~deepu/odes/odes-5_program.html